• 本课程为精品课,您可以登录eeworld继续观看:
  • Multilevel Logic—Satisfiability Don’t Cares
  • 登录
课程介绍
相关标签: 集成电路
A modern VLSI chip has a zillion parts -- logic, control, memory, interconnect, etc.  How do we design these complex chips?  Answer: CAD software tools.  Learn how to build thesA modern VLSI chip is a remarkably complex beast:  billions of transistors, millions of logic gates deployed for computation and control, big blocks of memory, embedded blocks of pre-designed functions designed by third parties (called “intellectual property” or IP blocks).  How do people manage to design these complicated chips?  Answer: a sequence of computer aided design (CAD) tools takes an abstract description of the chip, and refines it step-wise to a final design. This class focuses on the major design tools used in the creation of an Application Specific Integrated Circuit (ASIC) or System on Chip (SoC) design. Our focus in this first part of the course is on key Boolean logic representations that make it possible to synthesize, and to verify, the gate-level logic in these designs.  This is the first step of the design chain, as we move from logic to layout.    Our goal is for students to understand how the tools themselves work, at the level of their fundamental algorithms and data structures. Topics covered will include: Computational Boolean algebra, logic verification, and logic synthesis (2-level and multi-level).

Recommended Background

Programming experience (C, C++, Java, Python, etc.) and basic knowledge of data structures and algorithms (especially recursive algorithms).  An understanding of basic digital design:  Boolean algebra, Kmaps, gates and flip flops, finite state machine design.  Linear algebra and calculus at the level of a junior or senior in engineering.  Exposure to basic VLSI at an undergraduate level is nice -- but it’s not necessary.  We will keep the course self-contained, but students with some VLSI will be able to skip some background material.e tools in this class.

人们如何设计这些复杂的芯片?答:一系列计算机辅助设计(CAD)工具对芯片进行抽象描述,并逐步细化到最终设计。本课程主要介绍在建立特定应用集成电路(ASIC)或系统芯片(SoC)设计时所使用的主要设计工具。

显示全部 ↓
推荐视频

    猜您喜欢

    推荐帖子

    东芝光电继电器TLP3547评测-控制直流电机
    这次测量的是用光继电器控制普通直流电机。如图,继电器的8脚5脚分别接电源和电机。通过万用表测试发现,电流0.046,完全无法达到其电流上限,说明电机负载还可以增加。此外,光继电器的启动电压低,只需达到1.8v就可以工作。
    lehuijie 东芝光电继电器TLP3547评测
    Beaglebone开发板 智能安全巡逻飞行器
    PENGSHIFANG DSP 与 ARM 处理器
    烧录问题,疑是仿真器故障
    各位大大您们好:小弟我的LaunchPad(MSP-EXP430G2)突然不能烧录了,前一分钟正常,在没有更改USB链接、电路、电源、等等的情况下,只改了一些程式,就突然显示一下信息:【MSP430: Error initializing emulator: Could not find MSP-FET430UIF on specified COM port】我重启了电脑,也换了一台原本能正常烧录
    BirdOfDeath 微控制器 MCU
    钽电容与铝电容比较
    czf0408 分立器件
    【ESK32-360测评】ESK32-360的使用感受
    ESK32-360开发板是合泰半导体推出的一款针对HT32F1654单片机的一款开发板,合泰半导体是台湾盛群半导体下属的一家以单片机和周边组件为主的半导体公司,总部位于广东东莞。这块板子是在EEWORLD论坛评测板块https://bbs.eeworld.com.cn/elecplay/content/135里免费申请的, 可以看到论坛一共放出5块板子试用,11个人申请,能申请到的几率好像是45%
    littleshrimp 国产芯片交流
    在STM32F769DICSCO上体验MicroPython
    [size=3]今天发现MicroPython源码中添加了对STM32F769DISCO开发板的支持,于是更新最新源码并编译固件,成功在STM32F769DISCO开发板上运行了MicroPython,但是体验过程中,稳定性不是很好。[/size][size=3]在Linux系统下重新编译源码,并生成固件,首先编辑makefile文件更改开发板名称为STM32F769DISCO:[/size][s
    hanyeguxingwo MicroPython开源版块

    推荐内容

    热门视频更多

    可能感兴趣器件

    完成课时学习+分/次

     
    EEWorld订阅号

     
    EEWorld服务号

     
    汽车开发圈

     
    机器人开发圈

    About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版 版权声明

    站点相关: 汽车电子 智能硬件

    北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

    电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2025 EEWORLD.com.cn, Inc. All rights reserved